A host adapter board (“HAB”) plugs into a host computer system to provide added functionality to the computer system. For example, the HAB facilitates communication between a peripheral component interconnect (“PCI”) bus of the host computer system and a peripheral device (e.g., a storage subsystem, a network communication medium, etc.). The HAB often includes one or more components that provide the interface to the PCI bus and one or more components (e.g., an I/O controller) that provide interfacing to the peripheral device.
The PCI bus standards define certain PCI signal timing specifications. The PCI bus signal standards may be found, for example, at http://www.pcisig.com/specifications. Among the signalling standards specified therein are slew rate and clock-to-signal-valid delay. “Slew rate” defines a maximum rate of change in an output signal, for example four volts per nanosecond within a defined operating voltage range. “Clock-to-signal-valid” delay defines the time (e.g., five nanoseconds) between an initial clock signal and a ready state, which can be used to initiate data transfer to the HAB. To function properly, the HAB must process PCI signals from the bus within these PCI timing specifications.
To ensure that the timing of PCI signals in the HAB conform to PCI timing specifications, the HAB is tested one PCI signal at a time. As presently practiced in the art, this testing occurs through use of software utilities of a computer host connected to the HAB through the PCI bus; the software utilities serve to toggle PCI lines to the HAB while an engineer measures, for example, slew rate and clock-to-signal-valid delay. It is not however always possible to check each PCI signal since, currently, (a) the PCI signal under test must be isolated from the PCI bus in order to be measured and yet (b) certain connections are required so that the PCI bus functions properly. Accordingly, when isolated from the PCI bus, certain PCI signals are not configurable on the bus; they cannot therefore be toggled through the software utilities.
One solution to the foregoing problem is to “jumper” pins of the HAB so that all pins connect to the PCI bus during measurement; the software utilities are then operable to verify compliance with PCI timing specifications. Unfortunately, to jumper all PCI signals requires either (a) hardware modification to the HAB or (b) temporary wiring to PCI connectors or PCI traces within the HAB, which can create other problems, such as increased signal delay or noise, or disconnected signal lines.